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TA1343N
TOSHIBA Bipolar Linear IC Silicon Monolithic
TA1343N
TV Sound Processor
TA1343N is a sound processor controlled by I2C bus. It incorporates the following: 2-channel input, 3-channel output signal processing circuit, phase shift circuit for surround, and LPF for woofer channel. ALS (Automatic Level Suppresser) circuit which prevents distort the signal in large signal condition for woofer channel is also incorporated
Features
* Sound processing circuit * 2 ch inputs (Lch, Rch) * 3 ch outputs (Lch, Rch, Wch) * Input matrix switch * Volume control * Bass, treble, and balance adjustment * Woofer level and surround effect level adjustment * ALS (automatic level suppresser) circuit * Built-in LPF for bass boost * Surround circuit * Phase shift surround system * 2 modes stereo surround * Pseudo stereo mode Weight: 1.22 g (typ.)
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TA1343N
Block Diagram
Treble HPF (L)
Woofer LPF3
Woofer LPF2
Woofer LPF1
Volume Filter
Bass LPF (L)
Woofer Filter
24
2
23
22
21
20
19 ALS SW AGC Det + 0dB /-5dB
18
17
16 +
15
14
I C bus interfaxe
Level Control DAC
Rch Output 13 + 12 Wch Output Bass boost SW
VCC (9 V)
Lch Output
SDA
SCL
L.P.F
L-R Level Control
L.P.F
Woofer Level Control Bass& Treble Control
4f f
Phase sifter +
-
0dB /-5dB
Input matrix
Bias Reg.
1 O.C.
2 B4 B3
3 B2
4
5 B1 Lch Input
6 GND
7 Rch Input
8 Bias Filter
9
10 Bass LPF (R)
Treble HPF (R)
Volume&Balance Control 11
Bass& Treble Control
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Terminal Function
Pin No. Name Function Interface Circuit
DC offset canceling filter for bass boost. 1 Offset canceling filter Connect a capacitor (10 mF) between this terminal and GND. 1
100 W
30 kW
7
20 2 3 4 5 f4 f3 f2 f1 Terminals for capacitors of the phase shift blocks. Value of phase shift each block is -1 f deg. = -2tan (2 p fCR) C is capacitance of external capacitor R is resistance of internal resister (10 k W (typ.)). 2 3 4 5 100 W 10 k9
7
20
24 kW 6 8 Lch Input Audio input terminals. Rch Input 56 k9 56 k9 9 7 4.5 V 7 7 GND GND terminals. 20 Filter for noise rejection of the bias. 9 Bias Filter Connect a capacitor (4.7 mF) between this terminal and GND. 6 8 24 kW
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1 k9
20
TA1343N
Pin No. Name Function Interface Circuit
20
10 15
Bass LPF (R) Bass LPF (L)
LPFs for bass control circuits. Connect capacitors (0.027 mF) between each terminals and GND.
10 15
100 W 22 kW 22 k9 4.5 V 22 kW 22 k9 7 7 20 17 18 19 2 kW 7 1 mA 12 13 16 100 W 100 9 20
7
20
11 14
Treble HPF (R) Treble HPF (L)
HPFs for treble control circuits. Connect capacitors (8200 pF) between each terminals and GND.
11 14
11 kW
12 13 16
Wch Output Rch Output Lch Output Audio output terminal.
LPFs for bass boost circuit. 17 18 19 Woofer LPF 1 Woofer LPF 2 Woofer LPF 3 Connect a capacitor (0.033 mF) between terminal 17 and GND. Connect a capacitor (0.047 mF) between terminal 18 and GND. Connect a capacitor (0.022 mF) between terminal 19 and GND.
VCC terminal. 20 VCC Recommended operation voltage is 9 V 10%.
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4.5 V
TA1343N
Pin No. Name Function Interface Circuit
20
I2C Bus Control
Smoothing filter for volume control. 21 Volume Filter Connect a capacitor (0.01 mF) between this terminal and GND. 21
7
20 Smoothing filter for bass boost level control. 22 Woofer Filter Connect a capacitor (3.3 mF) between this terminal and GND. This filter is also for ALS circuit. 7 22
I2C Bus Control
20
23
SCL
SCL terminal.
23 2.3 V 7 20
24
SDA
SDA terminal.
24 2.3 V 7
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TA1343N
I C Bus Control Data Table
Slave Address: 80 (h) Address Map
Sub MSB (b7) Address 00 01 02 ALS SW "0": OFF "1": ON b6 b5 b4 b3 b2 b1 LSB (b0) Default Data 40 (h) (Bass: Center) 40 (h) (Treble: Center) 00 (h) (Volume: min) 00 (h) (ALS SW: OFF ALS start point: 220 mV Input attenuation: 0dB Input matrix: Normal) 00 (h) (Woofer level: min) 40 (h) (Balance: Center) C0 (h) (Surround mode 1: 4 f Surround mode 2: Mono. Surround effect level: OFF) 10 (h) Bass boost SW: OFF Woofer LPF fo: 125 Hz Muting 1: OFF Muting 2: OFF
2
Bass level (effective data range: 0E (h) to 72 (h)) Treble level (effective data range: 0E (h) to 72 (h)) Volume (effective data range: 00 (h) to 72 (h)) ALS start point "00": 220 mV "01": 380 mV "10": 525 mV "11": 770 mV Woofer level Input attenuati on "0": 0dB "1": -5dB Input matrix "00": Normal "01": Rch "10": Lch "11": Reverse
03
04 05 Surround mode 2 "0": Ste. "1": Mono. Bass boost SW "0": OFF "1": ON Surround mode 1 "0": f "1": 4 f
(effective data range: 00 (h) to 72 (h))
Balance (effective data range: 00 (h) to 7F (h)) Surround effect level (effective data range 1 (h) to 7 (h)) 0 (h): OFF
06
07
Woofer LPF fo "00": 100 Hz "01": 125 Hz "10": 170 Hz "11": 210 Hz
Woofer LPF defeat "0": OFF "1": ON
Muting 2 "0": OFF "1": ON
Muting 1 "0": OFF "1": ON
The bits shown gray area must be "0".
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TA1343N
Block Diagram
10 kW Input matrix Lch Input 6 + Rch Input 8 5 B1 B2 4 3 B3 B4 2 Surround mode 2 Phase Sifter Surround mode 1 4f f LPF L-R Level Control -
+
Muting 2 Level Control DAC Woofer Level Control
0dB /-5dB
Bass Treble Control
Volume&Balance Control
0dB /-5dB
Bass Treble Control
+ +
16 Lch Output
13 Rch Output 12 Wch Output Bass boost SW
L.P.F
AGC Det ALS SW
Level Control DAC 11 Treble HPF (R) 15 Bass LPF (L) 14 Treble HPF (L) 21 Volume Filter Muting 1
17 18 19 Woofer LPF1 Woofer LPF2 Woofer LPF3 O.C.
1
22 Woofer Filter
10 Bass LPF (R)
The on/off status of each switches drawn on this scheme shows 2 the default setting of I C bus control.
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TA1343N
Explanation of the Functions. (note: (h) means hexadecimal data, (b) means binary data)
* Bass level control (sub address 00 (h)) Bass level control. Crossover frequency is 1 kHz. Effective control data range is 0E (h) to 72 (h) (100 steps). Set this data to 0E (h), bass level goes to minimum level, and set this data to 72 (h), bass level goes to maximum level. Set this data to 40 (h), bass level goes to center level. Switch on default data is 40 (h). Control range is 12dB (typ.). * Treble level control (sub address 01 (h)) Treble level control. Crossover frequency is 1 kHz. Effective control data range is 0E (h) to 72 (h) (100 steps). Set this data to 0E (h), treble level goes to minimum level, and set this data to 72 (h), treble level goes to maximum level. Set this data to 40 (h), treble level goes to center level. Switch on default data is 40 (h). Control range is 12dB (typ.). * Volume control (sub address 02 (h)) Volume control of only Lch and Rch output. Effective control data range is 00 (h) to 72 (h). Switch on default data is 00 (h). * Woofer level control (sub address 04 (h)) Volume control of only Wch output. Effective control data range is 00 (h) to 72 (h). Switch on default data is 00 (h). * Balance control (sub address 05 (h)) Balance control. Set this data to 40 (h), balance goes to center. Effective control data range is 00 (h) to 7F (h). Switch on default data is 40 (h). * Surround effect level control (sub address 06 (h)/b2 to b0) Surround effect level control. Effective control data range is 1 (h) to 7 (h). Set this data to 0 (h), surround function is off. Recommend setting surround 2 data to 1 (b) when surround effect level set to "0". Set mute on when surround effect level is changed. Switch on default data is 0 (h). * Input matrix switch (sub address 03 (h)/b1 to b0) Output signal selection control. Set these bits to 00 (b), output mode goes to normal mode (input signal of terminal 6 is outputted to terminal 16, and input signal of terminal 8 is outputted to terminal 13). Set these bits to 01 (b) output mode goes to Rch mode (input signal of terminal 8 is outputted to terminal 13 and terminal 16). Set these bits to 10 (b) output mode goes to Lch mode (input signal of terminal 6 is outputted to terminal 13 and terminal 16). Set these bits to 11 (b), output mode goes to reverse mode (input signal of terminal 6 is outputted to terminal 13, and input signal of terminal 8 is outputted to terminal 16). Switch on default data is 00 (b). * Input attenuation (sub address 03 (h)/b2) When this function is active, input signals are -5dB attenuated at input stage of Lch and Rch. Wch signal isn't attenuated. So, Wch output signal level is up to 5dB from Lch and Rch outputs relatively. Set the bit to 0 (b), attenuation is inactive, set the bit to 1 (b), attenuation is active. Switch on default data is 0 (b).
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* ALS switch (sub address 03 (h)/b6), ALS start point (sub address 03 (h)/b5 to b4) Gain of Wch is large. So output signals of Wch is distort easily when the input signals are large. ALS (Automatic Level Suppresser) suppresses Wch signal level under ALS start point, and reduces the distortion in large signals input condition. Set the bit of sub address 03 (h)/b6 to 0 (b), ALS is inactive. Set the bit 1 to (b), ALS is active. Switch on default data is 0 (b). The bits of 03 (h)/b5 to b4 set ALS start point. Set the bits to 00 (b), ALS start point is 220 mVrms. Set the bits to 01 (b), ALS start point is 380 mVrms. Set the bits to 10 (b), ALS start point is 525 mVrms. And set the bits to 11 (b), ALS start point is 770 mVrms. Switch on default data is 00 (b). * Surround mode 1 (sub address 06 (h)/b6), Surround mode 2 (sub address 06 (h)/b7) Surround mode 1 is selection of phase shift value of the surround circuit. Set the bit to 0 (b), L-R signal is shifted by 1 phase shift stage. Set the bit to 1 (b), L-R signal is shifted by 4 phase shift stages. Surround mode 2 is selected by condition of the input signal. When input signal is stereo, surround mode 2 must be set to 0 (b). When input signal is monaural, surround mode 2 must be set to 1 (b) (pseudo stereo mode). Recommend setting surround 1 to 1 (b) when pseudo stereo mode is selected. * Mute 1 (sub address 07 (h)/b0), Mute 2 (sub address 07 (h)/b1) When Mute 1 is active, all outputs are muted. Set the bit to 0 (b), mute 1 is inactive. Set the bit to 1 (b), Mute 1 is active. Switch on default data is 0 (b). When Mute 2 is active, only Wch output is muted. Set the bit to 0 (b), Mute 2 is inactive. Set the bit to 1 (b), Mute 2 is active. Switch on default data is 0 (b). * Woofer LPF fo (sub address 07 (h)/b5 to b4) These bits set cut off frequency (fo) of the low pass filter for Wch. Set the bits to 00 (b), fo is 100 Hz (-3dB point). Set the bits to 01 (b), fo is 125 Hz. Set the bits to 10 (b), fo is 170 Hz. Set the bits to 11 (b), fo is 210 Hz. Switch on default data is 01 (h). * Woofer LPF defeat (sub address 07 (h)/b3) Set the bit to 1 (b), Woofer LPF is defeated. This function is for device test. So, this bit must be set to 0 (b). Switch on default data is 0 (b). * Bass boost switch (sub address 07 (h)/b7) Bass boost function is adding Wch signal to main channel signals. It can boost low frequency signal without woofer output. Set the bit 0 (b), Bass boost is inactive. Set the bit 1 (b), bass boost is active. Switch on default data is 0 (b). Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as define by Philips.
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TA1343N
Maximum Ratings (Ta = 25C)
Characteristics Supply voltage Power dissipation Operating temperature Storage temperature Maximum input voltage Minimum input voltage Symbol VCC PD Topr Tstg VMAX VMIN Rating 12 1400 -20 to 75 -55 to 150 VCC + 0.3 VCC - 0.3 (Note 1) Unit V mW C C V V
Note 1: When using the device at Ta = 25C, decrease the power dissipation by 11.2 mW for each increase of 1C
Recommended Supply Voltage
Pin No. 20 Pin Name VCC Min 8.1 Typ. 9.0 Max 9.9 Unit V
Electrical Characteristics
DC Characteristics (VCC = 9 V, Ta = 25C)
Characteristics Power dissipation Pin No. 20 1 2 3 4 5 6 8 9 10 Pin voltage 11 12 13 14 15 16 17 18 19 21 22 VCC Offset canceling filter f4 f3 f2 f1 Lch Input Rch Input Bias Filter Bass LPF (R) Treble LPF (R) Wch Output Rch Output Treble LPF (L) Bass LPF (L) Lch Output Woofer LPF1 Woofer LPF2 Woofer LPF3 Volume Filter Woofer Filter Pin Name Symbol ICC V1 V2 V3 V4 V5 V6 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 V21 V22 1 In power on default Test Circuit Test Condition Min 39 4.0 4.0 4.0 4.0 4.0 4.0 4.0 5.2 4.0 4.0 4.0 4.0 4.0 4.0 4.0 4.6 4.6 4.6 3/4 0.5 Typ. 50 4.5 4.5 4.5 4.5 4.5 4.5 4.5 5.7 4.5 4.5 4.5 4.5 4.5 4.5 4.5 5.1 5.1 5.1 0.0 1.5 Max 63 5.0 5.0 5.0 5.0 5.0 5.0 5.0 6.2 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.6 5.6 5.6 3/4 2.0 V Unit mA
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TA1343N
AC Characteristics (VCC = 9 V, Ta = 25C)
Characteristics Symbol Go L Go R GoAtt L Gain GoAtt R GoBst L GoBst R Go W THD L THD THD R THD W SN L S/N SN R SN W vNO L Residual noise vNO R vNO W Go100 L Frequency response (100 Hz) Go100 R Go10k L Frequency response (10 kHz) Go10k R Go10k S GLPF100 LPF frequency response GLPF125 GLPF170 GLPF210 Surround sound gain Surround sound phase Balance center Balance minimum GS Ph 4 f DGLR GBLMIN L GBLMIN R Bass maximum GBSMAX L GBSMAX R Bass minimum GBSMIN L GBSMIN R Treble maximum GTRMAX L GTRMAX R Treble minimum GTRMIN L GTRMIN R GVLCNT L Volume center GVLCNT R GVLCNT W Test Circuit 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 (Note 16) -17 -15 -12 dB (Note 8) (Note 9) (Note 10) (Note 11) (Note 7) 4.0 1.0 1.5 -65 -2.0 3/4 6.0 8.0 3.5 -110 0.0 -70 8.0 15.0 5.5 -65 2.0 -60 dB deg. dB dB (Note 6) (Note 5) -2.0 0.0 2.0 dB (Note 4) 3/4 20 50 Vrms (Note 3) 68 72 70 (Note 2) 3/4 (Note 1) Test Condition Min 0.0 Typ. 2.0 Max 4.0 Unit
-7.0
-5.0
-3.0
dB
11.0 16.0
13.0 19.0 0.03
15.0 22.0
1.0 0.25 74
%
3/4
dB
-2.0 -13.0 4.0 5.5
0.0 -11.0 6.0 7.5
2.0 dB -8.0 8.0 9.5 dB
(Note 12)
9
12
14
dB
(Note 13)
-14
-12
-9
dB
(Note 14)
9
12
14
dB
(Note 15)
-14
-12
-9
dB
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TA1343N
Characteristics Symbol GVLMIN L Volume minimum GVLMIN R GVLMIN W Woofer level center ALS start point 0 ALS start point 1 ALS start point 2 ALS start point 3 Cross talk GWLCNT vALS0 vALS1 vALS2 vALS3 CTL-R CTR-L RR1 L Ripple rejection (volume minimum) RR1 R RR1 W RR2 L Ripple rejection (volume maximum) RR2 R RR2 W vDOUT L Output dynamic range vDOUT R vDOUT W vDIN L Input dynamic range vDIN R vDIN W DC offset (muting) DC offset (surround switch) DVM L DVM R DVM W DVS L DVS R GMUT L Mute residual level GMUT R GMUT W Test Circuit 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 (Note 27) 3/4 -90 -70 dB (Note 26) 3/4 3/4 50 mV (Note 25) 3/4 3/4 380 mV (Note 24) 3.0 4.5 (Note 23) (Note 22) 3/4 3/4 6.0 5.5 6.0 5.5 (Note 21) 3/4 (Note 20) (Note 19) 460 655 3/4 525 770 -82 585 880 -72 (Note 18) -9.5 185 325 -7.5 220 380 -5.5 255 430 dB mVrms mVrms mVrms mVrms dB (Note 17) 3/4 -77 -65 dB Test Condition Min Typ. Max Unit
-48 -53 -42 -32 6.7 6.3 6.7 7.5
-30
dB
-30 -25
dB
3/4
Vp-p
3/4 3/4
Vp-p
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TA1343N
Test Condition
Test Condition Note Input Point TP6 TP8 Meas. Point TP12 TP13 TP16 Bus Data (hexadecimal) SW1 00 40 01 40 02 72 03 00 / 04 04 72 05 40 06 C0 07 10 / 90 (a) * * * * * * * * * * * * * * * 2 TP6 TP8 TP12 TP13 TP16 40 40 72 00 72 40 C0 10 (a) * * * * 3 TP6 TP8 TP12 TP13 TP16 40 40 72 00 72 40 C0 10 (a) * * * * * * * * * * 4 3/4 TP12 TP13 TP16 40 40 00 00 00 40 C0 10 (a) * * Set data of sub address 03 (h) to 00 (h) and set data of sub address 07 (h) to 10 (h). Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T13 and TP16 (v131 mVrms, v161 mVrms). Go RdB = 20log (v131/500) Go LdB = 20log (v161/500) Set data of sub address 03 (h) to 04 (h). Measure amplitude of T13 and TP16 (v132 mVrms, v162 mVrms). GoAtt RdB = 20log (v132/v131) GoAtt LdB = 20log (v162/v161) Set data of sub address 03 (h) to 00 (h) and set data of sub address 07 (h) to 10 (h). Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T13 and TP16 (v133 mVrms, v163 mVrms). Set data sub address 07 (h) to 90 (h). Measure amplitude of T13 and TP16 (v134 mVrms, v164 mVrms). GoBst RdB = 20log (v134/v133) GoBst LdB = 20log (v164/v163) Measure amplitude of TP12 (v12 mVrms). Go WdB = 20log (v12/100) Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure THD of TP13 and TP 16 (THD R%, THD L%). Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. Measure THD of TP12 (THD W%) Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T13 and TP16 (v13s mVrms, v16s mVrms). Connect TP6 and TP8 to GND. Measure amplitude of T13 and TP16 (v13n mVrms, v16n mVrms). SN RdB = 20log (v13s/v13n) SN LdB = 20log (v16s/v16n) Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T12 (v12s mVrms). Connect TP6 and TP8 to GND. Measure amplitude of T12 (v12n mVrms). SN WdB = 20log (v12s/v12n) Connect TP6 and TP8 to GND. Measure amplitude of TP12, TP13 and TP16 (vNO W mVrms, vNO R mVrms, vNO L mVrms).
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Test Condition Note Input Point TP6 TP8 Meas. Point TP13 TP16 Bus Data (hexadecimal) SW1 00 40 01 40 02 72 03 00 04 00 05 40 06 C0 07 10 (a) * * * * * 6 TP6 TP8 TP13 TP16 40 40 72 00 00 40 C0 / C7 10 (a) * * * * * * * * * * * * * 7 TP6 TP8 TP12 40 40 72 00 00 40 C0 00 / 10 / 20 / 30 / 14 (a) * * * * * * * * * * * * Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T13 and TP16 (v130 mVrms, v160 mVrms). Input signal (100 Hz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T13 and TP16 (v13 mVrms, v16 mVrms). G100 RdB = 20log (v13/v130) G100 LdB = 20log (v16/v160) Set data of sub address 06 (h) to 00 (h). Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T13 and TP16 (v130 mVrms, v160 mVrms). Input signal (10 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of T13 and TP16 (v131 mVrms, v161 mVrms). G10k RdB = 20log (v131/v130) G10k LdB = 20log (v161/v160) Set data of sub address 06 (h) to C7 (h). Connect TP6 to GND. Input signal (1 kHz, 500 mVrms, sine wave) to TP8. Measure amplitude of T16 (v162 mVrms). Input signal (10 kHz, 500 mVrms, sine wave) to TP8. Measure amplitude of T16 (v163 mVrms). G10k SdB = 20log (v163/v162) Input signal (300 Hz, 100 mVrms, sine wave) to TP6 and TP8. Set data of sub address 07 (h) to 00 (h). Measure amplitude of TP12 (v120 mVrms). Set data of sub address 07 (h) to 10 (h). Measure amplitude of TP12 (v121 mVrms). Set data of sub address 07 (h) to 20 (h). Measure amplitude of TP12 (v122 mVrms). Set data of sub address 07 (h) to 30 (h). Measure amplitude of TP12 (v123 mVrms). Set data of sub address 07 (h) to 14 (h). Measure amplitude of TP12 (v12X mVrms). GLPF100dB = 20log (v120/v121) GLPF125dB = 20log (v121/v122) GLPF170dB = 20log (v122/v123) GLPF210dB = 20log (v123/v12X)
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Test Condition Note Input Point TP6 TP8 Meas. Point TP16 Bus Data (hexadecimal) SW1 00 40 01 40 02 72 03 00 04 00 05 40 06 C0 / C7 07 10 (a) * * * * * * * 9 TP8 TP16 40 40 72 00 00 40 C7 10 (a) * * * 10 TP6 TP8 TP13 TP16 40 40 72 00 00 40 C0 10 (a) * * * 11 TP6 TP8 TP13 TP16 40 40 72 00 00 0E / 72 C0 10 (a) * * * * * * 12 TP6 TP8 TP13 TP16 40 / 72 40 72 00 00 40 C0 10 (a) * * * * * * 13 TP6 TP8 TP13 TP16 40 / 0E 40 72 00 00 40 C0 10 (a) * * * * * * Set data of sub address 06 (h) to C0 (h). Connect TP8 to GND and input signal (1 kHz, 500 mVrms, sine wave) to TP6. Measure amplitude of TP16 (v160 mVrms). Set data of sub address 06 (h) to C7 (h). Connect TP6 to GND and input signal (1 kHz, 500 mVrms, sine wave) to TP8. Measure amplitude of TP16 (v161 mVrms). G SdB = 20log (v161/v160) Connect TP6 to GND. Input signal (400 Hz, 500 mVrms, sine wave) to TP8. Measure phase between TP8 and TP16 (Ph 4 f deg.). Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Measure amplitude of TP13 and TP16 (v13 mVrms, v16 mVrms). DGLRdB = 20log (v16/V13) Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 05 (h) to 0E (h). Measure amplitude of TP13 and TP16 (v13R mVrms, v16R mVrms). Set data of sub address 05 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13L mVrms, v16L mVrms). GBLMIN R = 20log (v13R/v16R) GBLMIN L = 20log (v16L/v13L) Input signal (100 Hz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 00 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). Set data of sub address 00 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13B mVrms, v16B mVrms). GBSMAX R = 20log (v13B/v130) GBSMAX L = 20log (v16B/v130) Input signal (100 Hz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 00 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). Set data of sub address 00 (h) to 0E (h). Measure amplitude of TP13 and TP16 (v13B mVrms, v16B mVrms). GBSMIN R = 20log (v13B/v130) GBSMIN L = 20log (v16B/v130)
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Test Condition Note Input Point TP6 TP8 Meas. Point TP13 TP16 Bus Data (hexadecimal) SW1 00 40 01 40 / 72 02 72 03 00 04 00 05 40 06 C0 07 10 (a) * * * * * * 15 TP6 TP8 TP13 TP16 40 40 / 0E 72 00 00 40 C0 10 (a) * * * * * * 16 TP6 TP8 TP12 TP13 TP16 40 40 72 / 40 00 72 40 C0 10 (a) * * * * * * * * * * * * Input signal (10 kHz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 01 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). Set data of sub address 01 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v13T mVrms, v16T mVrms). GTRMAX R = 20log (v13T/v130) GTRMAX L = 20log (v16T/v130) Input signal (10 kHz, 250 mVrms, sine wave) to TP6 and TP8. Set data of sub address 01 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). Set data of sub address 01 (h) to 0E (h). Measure amplitude of TP13 and TP16 (v13T mVrms, v16T mVrms). GTRMIN R = 20log (v13T/v130) GTRMIN L = 20log (v16T/v130) Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). Set data of sub address 02 (h) to 40 (h). Measure amplitude of TP13 and TP16 (v13C mVrms, v16C mVrms). GVRCNT R = 20log (v13C/v130) GVRCNT L = 20log (v16C/v130) Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP12 (v120 mVrms). Set data of sub address 02 (h) to 40 (h). Measure amplitude of TP12 (v12C mVrms). GVRCNT W = 20log (v12C/v120)
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TA1343N
Test Condition Note Input Point TP6 TP8 Meas. Point TP12 TP13 TP16 Bus Data (hexadecimal) SW1 00 40 01 40 02 72 / 0E 03 00 04 72 05 40 06 C0 07 10 (a) * * * * * * * * * * * * 18 TP6 TP8 TP12 40 40 72 00 72 / 40 40 C0 10 (a) * * * * * * 19 TP6 TP8 TP12 40 40 72 40 / 50 / 60 / 70 72 40 C0 10 (a) * * * * * * * * * 20 TP6 TP8 TP13 TP16 40 40 72 00 00 40 C0 10 (a) * * * * * * * * * * Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). Set data of sub address 02 (h) to 0E (h). Measure amplitude of TP13 and TP16 (v13MIN mVrms, v16MIN mVrms). GVRMIN R = 20log (v13MIN/v130) GVRMIN L = 20log (v16MIN/v130) Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. Set data of sub address 02 (h) to 72 (h). Measure amplitude of TP12 (v120 mVrms). Set data of sub address 02 (h) to 0E (h). Measure amplitude of TP12 (v12MIN mVrms). GVRMIN W = 20log (v12MIN/v120) Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. Set data of sub address 04 (h) to 72 (h). Measure amplitude of TP12 (v120 mVrms). Set data of sub address 04 (h) to 40 (h). Measure amplitude of TP12 (v12C mVrms). GWLCNT = 20log (v12C/v120) Input signal (80 Hz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 03 (h) to 40 (h). Measure amplitude of TP12 (vALS0 mVrms) Set data of sub address 03 (h) to 50 (h). Measure amplitude of TP12 (vALS1 mVrms) Set data of sub address 03 (h) to 60 (h). Measure amplitude of TP12 (vALS2 mVrms) Set data of sub address 03 (h) to 70 (h). Measure amplitude of TP12 (vALS3 mVrms) Connect TP8 to GND. Input signal (1 kHz, 500 mVrms, sine wave) to TP6. Measure 1 kHz spectrum of TP16 (v161dBmV). Measure 1 kHz spectrum of TP13 (v131dBmV). CTL-R = 20log (v131 - v161) Connect TP6 to GND. Input signal (1 kHz, 500 mVrms, sine wave) to TP8. Measure 1 kHz spectrum of TP13 (v132dBmV). Measure 1 kHz spectrum of TP16 (v162dBmV). CTR-L = 20log (v162 - v132)
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TA1343N
Test Condition Note Input Point TP6 TP8 Meas. Point TP12 TP13 TP16 Bus Data (hexadecimal) SW1 00 40 01 40 02 00 03 00 04 00 05 40 06 C0 07 10 (b) * * * * Connect TP6 and TP8 to GND. Apply 9.0 V DC and sine wave (60Hz, 500 mVrms) to VCC terminal. Measure amplitude of TP12, TP13 and TP16 (v12 mVrms, v13 mVrms, v16 mVrms). RR1 WdB = 20log (v12/500) RR1 RdB = 20log (v13/500) RR1 LdB = 20log (v16/500) Connect TP6 and TP8 to GND. Apply 9.0 V DC and sine wave (60Hz, 500 mVrms) to VCC terminal. Measure amplitude of TP12, TP13 and TP16 (v12 mVrms, v13 mVrms, v16 mVrms). RR2 WdB = 20log (v12/500) RR2 RdB = 20log (v13/500) RR2 LdB = 20log (v16/500) Input signal (100 Hz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the outputs are 1% (vDOUT R1 Vp-p, vDOUT L1 Vp-p). Input signal (10 kHz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the outputs are 1% (vDOUT R2 Vp-p, vDOUT L2 Vp-p). Smaller value vDOUT R1 or vDOUT R2 is vDOUT R. Smaller value vDOUT L1 or vDOUT L2 is vDOUT L. Input signal (80 Hz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP 12. Measure amplitude of TP12 when THD of the output is 1% (vDOUT W Vp-p). Input signal (1 kHz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP6 and TP8 when THD of the outputs are 1% (vDIN R Vp-p, vDIN L Vp-p). Input signal (80 Hz, sine wave) to TP6 and TP8. Increase amplitude of the input signal, and measure THD of TP 12. Measure amplitude of TP6 and TP8 when THD of the outputs are 1% (vDIN W Vp-p) Connect TP6 and TP8 to GND. Set data of sub address 07(h) to 10 (h), 11 (h), 12 (h). Measure DC offset of TP12, TP13 and TP16 (DVM W mV, DVM R mV, DVM L mV).
21
22
TP6 TP8
TP12 TP13 TP16
40
40
72
00
72
40
C0
10
(b)
* * * *
23
TP6 TP8
TP12 TP13 TP16
72
72
72
00
72
40
C0
10
(a)
* *
* *
*
* *
24
TP6 TP8
TP12 TP13 TP16
40
40
40
00
40
40
C0
10
(a)
* *
* *
25
TP6 TP8
TP12 TP13 TP16
40
40
72
00
72
40
C0
10 / 11 / 12
(a)
* *
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TA1343N
Test Condition Note Input Point TP6 TP8 Meas. Point TP13 TP16 Bus Data (hexadecimal) SW1 00 40 01 40 02 72 03 00 04 72 05 40 06 07 / 47 / 87 / C7 27 TP6 TP8 TP13 TP16 40 40 72 00 72 40 C0 10 / 11 / 12 (a) * * * * * * * * * * * * Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. Set data of sub address 07 (h) to 10 (h). Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). Set data of sub address 07 (h) to 11 (h). Measure amplitude of TP13 and TP16 (v13MUT mVrms, v16MUT mVrms). GMUT RdB = 20log (v13MUT/v130) GMUT LdB = 20log (v16MUT/v160) Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. Set data of sub address 07 (h) to 10 (h). Measure amplitude of TP12 (v120 mVrms) Set data of sub address 07 (h) to 12 (h). Measure amplitude of TP12 (v12MUT mVrms). GMUT WdB = 20log (v12MUT/v120) 07 10 (a) * * Connect TP6 and TP8 to GND. Change data of sub address 06 (h) to 07 (h), 47 (h), 87 (h), and C7 (h). Measure DC offset of TP13 and TP16 (DVS R mV, DVS L mV).
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TA1343N
Volume control characteristic (L, Rch)
10 0 -10 -20 30 20 10 0 -10
Volume control characteristic (Wch)
(dB)
(dB) Gain
16 32 48 64 80 96 112 128
-30 -40 -50 -60 -70 -80 -90 -100 0
-20 -30 -40 -50 -60 -70 -80 -90 0 16 32 48 64 80 96 112 128
Gain
Bus data
Bus data
Wch level control characteristic
30 20 10 0 -10 10 0 -10
Balance control characteristic
(dB) Relative gain
-20 -30 -40 -50 -60 -70 -80 -90 Lch Rch 16 32 48 64 80 96 112 128
(dB) Gain
-20 -30 -40 -50 -60 -70 -80 -90 0 16 32 48 64 80 96 112 128
-100 0
Bus data
Bus data
Suround gain control characteristic
10 0 -10
(dB) Suround gain
-20 -30 -40 -50 -60 -70 -80 -90 0 1 2 3 4 5 6 7
Bus data
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TA1343N
Tone control characteristics
16 12 8 Data = 72 (h) Data = 68 (h) Data = 5E (h) Data = 54 (h) Data = 4A (h) Data = 40 (h) Data = 36 (h) Data = 2C (h) Data = 22 (h) -8 -12 -16 20 Data = 18 (h) Data = 0E (h)
(dB)
4 0 -4
Relative gain
100
1k
10 k
20 k
Frequency (Hz)
Surround frequency characteristic (gain)
7.5 5.0 2.5 0 -2.5 -5.0 -7.5 -10.0 -12.5 20
Gain
(dB)
100
1k
10 k
20 k
Frequency (Hz)
Surround frequency characteristic (phase)/Mode 4 f
180 135 90
(deg)
45 0 -45 -90 -135 -180 20
Phase
100
1k
10 k
20 k
Frequency (Hz)
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TA1343N
Test Circuit 1
DC Characteristics
TP 1 10 mF TP 2 0.039 mF TP 3 0.01 mF TP 4 0.039 mF TP 5 0.039 mF TP 6 TA1343N 10 mF 6 19 0.022 mF TP 18 18 0.047 mF TP 17 10 mF TP 9 4.7 mF TP 10 0.027 mF TP 11 11 8200 pF TP 12 12 13 14 8200 pF TP 13 10 15 0.027 mF TP 14 9 16 TP 16 TP 15 8 17 0.033 mF 5 20 4 21 0.01 mF 0.01 mF A 100 mF VCC 9 V 3 22 3.3 mF TP 21 2 23 TP 22 1 24
TP 19
7 TP 8
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TA1343N
Test Circuit 2
AC Characteristics
10 mF 0.039 mF 0.01 mF 0.039 mF 0.039 mF TP 6 10 mF
1
24
SDA I2C Bus
2
23
SCL
3
22
SW1
3.3 mF 0.01 mF
(b) (a)
100 mF
4
21
5
20
51 W 9V 0.01 mF 100 mF
6 TA1343N
19
0.022 mF 0.047 mF 0.033 mF TP 16
7
18
TP 8
10 mF 4.7 mF 0.027 mF
8
17
9
16
10
15
0.027 mF
11 8200 pF TP 12 12
14 8200 pF 13 TP 13
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2002-02-12
TA1343N
Application Circuit
10 mF 0.039 mF 0.01 mF 0.039 mF 0.039 mF 10 mF
1
24
SDA I2C Bus
2
23
SCL
3
22
3.3 mF 0.01 mF 0.01 mF 9V 100 mF
4
21
5
20
6 TA1343N
19
Lch Input
0.022 mF 0.047 mF 0.033 mF 10 mF 0.027 mF
GND
7 Rch Input 10 mF 4.7 mF 0.027 mF 8
18
17
9
16
Lch Output
10
15
Rch Output
11 8200 pF 12
14 8200 pF 13
Wch Output
10 mF
10 mF
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2002-02-12
TA1343N
Package Dimensions
Weight: 1.22 g (typ.)
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TA1343N
RESTRICTIONS ON PRODUCT USE
000707EBA
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
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2002-02-12

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